This invention relates to a method for fabricating a static induction transistor and, in particular, to a method for fabrication which does not require growth of a high resistivity epitaxial semiconductor layer.
The static induction transistor is a field effect semiconductor device capable of operation at relatively high frequency and power. The transistors are characterized by a short, high resistivity semiconductor channel which may be controllably depleted of carriers. The current-voltage characteristics of the static induction transistor are generally similar to those of a vacuum tube triode. The devices are described by Nishizawa et al in U.S. Pat. No. 3,828,230 issued Aug. 6, 1974.
The static induction transistor generally uses vertical geometry with source and drain electrodes placed on opposite sides of a thin, high resistivity layer of one conductivity type. Gate regions of opposite conductivity type are positioned on opposite sides of the source. During operation a reverse bias is applied between the gate region and the high resistivity region causing a depletion region to extend into the channel below the source. As the magnitude of the reverse bias is varied, the source-drain current and voltage derived from an attached source of energy will also vary.
The gate-source structures for such devices are commonly formed on and in a high resistivity epitaxial semiconductor layer grown on a highly doped semiconductor substrate. The growing of high resistivity, defect-free epitaxial layers requires expensive equipment, long processing time and very stringent processing control, particularly where thick epitaxial layers are formed.